Shared memory multiprocessor system and method of operation thereof
US5297265A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jun 22, 1989 |
| Grant date | Mar 22, 1994 |
| Priority date | — |
| Expiry date | Jun 22, 2009 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/272
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A digital data processing apparatus has plural processing cells, each with a memory element that stores data page made up of plural subpages. At least one of the cells includes a CPU that can request access to a data subpage. A memory manager responds to selected data access requests by (i) allocating, within the memory local to the requesting CPU, exclusive physical storage space for a data page associated with the requested subpage, and (ii) storing the requested subpage in that allocated space. The apparatus recombines data pages and deallocates them on the basis of usage and access state. The apparatus also accesses data asynchronously with respect to execution of instructions by the CPU.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.