Interconnected multilayer boards and fabrication processes thereof
US5300735A · kind A · utility
23Cited by
4References
25Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 22, 1993 |
| Grant date | Apr 5, 1994 |
| Priority date | — |
| Expiry date | Mar 22, 2013 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10T29/49165
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
Described herein are interconnected mutilayer boards and their fabrication processes. Multilayer conductor lines of a skeleton structure are formed by conducting multilayer metallization while including all resist layers and metallic under-conductive layers and then removing the resist layers and metallic under-conductive layers at once. Spaces between the multilayer conductor lines of the skeleton structure are then filled with a solventless varnish so that insulating layers are formed. Modules making use of such interconnected multilayer boards and computers having such modules are also described.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.