Method for forming interconnector
US5308793A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jul 22, 1992 |
| Grant date | May 3, 1994 |
| Priority date | — |
| Expiry date | Jul 22, 2012 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L21/76877
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method of forming an interconnector configuration includes an arrangement for preventing a Ti type barrier metal associated with an silicone oxide type interlayer insulation membrane, from becoming oxidized and therefore facilitating the burial of high aspect ratio connection holes in a Al layer. The connection holes which are opened in the silicon oxide type interlayer insulation membrane are coated inside with a Ti type barrier metal are apt to be oxidized by oxygen which is released from the interlayer insulating membrane. This oxidation produces a reaction which deteriorates the reaction characteristics with a Al material layer during the burial of the connection holes and produces problems. Accordingly, in order to prevent the oxidation of the barrier metal, a SiNx side wall layer is formed on the sides of the connection hole. The provision of this layer is not limited to the side walls of the connection holes and can be also provided on the upper surface of the interlayer insulation membrane with the same effect. Alternatively, the interlayer insulation membrane per se can be formed of SiNx. In either case, the reaction between the barrier metal and the Al material layer is…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.