Aluminum-germanium alloys for VLSI metallization
US5308794A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Aug 18, 1993 |
| Grant date | May 3, 1994 |
| Priority date | — |
| Expiry date | Aug 18, 2013 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/0002
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An apparatus and method for forming an interconnect through an opening or on an insulation layer with the coefficient of thermal expansion of the interconnect adjusted to reduce the thermal stress between the interconnect and the insulation layer is described incorporating the steps of forming a solid solution of a binary alloy including germanium and aluminum or a ternary alloy including aluminum, germanium and a third element, for example silicon, and forming a precipitate from the solid solution at a reduced temperature with respect to the temperature of forming the solid solution whereby the volume of the precipitate including germanium and the remaining solid solution is larger than the volume of the original solid solution.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.