Field programmable gate array with direct input/output connection
US5311080A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Mar 26, 1993 |
| Grant date | May 10, 1994 |
| Priority date | — |
| Expiry date | Mar 26, 2013 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/1736
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A field programmable gate array that includes a dedicated path that directly connects an I/O pad to a selected register in the array of programmable function units. For example, a direct connection (i.e., without a configurable interconnect point) is provided from an I/O pad, through an input driver, to the input of a selected register in a given PFU. Either this same path, or alternatively a different path, may be used to directly connect a register output from a given PFU to an I/O pad, through an output driver. This technique avoids the need for special I/O registers in the programmable input/output cells, thereby increasing the flexibility of use and ease of design of the FPGA.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.