Method of providing lower contact resistance in MOS transistors
US5312766A · kind A · utility
46Cited by
5References
3Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Feb 7, 1992 |
| Grant date | May 17, 1994 |
| Priority date | — |
| Expiry date | Feb 7, 2012 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S148/059
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Germanium is used to significantly enhance the drift mobilities of minority carriers in the channels of N-channel and P-channel metal-oxide-semiconductor (MOS) transistors with silicon substrates. Germanium processing is also used to enhance the source/drain contact conductance for MOS devices. Methods are disclosed for forming the germanium-rich interfacial layer utilizing a germanium implant and wet oxidation or growing a silicon-germanium alloy by molecular beam epitaxy.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.