Translation of virtual addresses in a computer graphics system
US5313577A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Aug 21, 1991 |
| Grant date | May 17, 1994 |
| Priority date | — |
| Expiry date | Aug 21, 2011 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2360/127
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A computer graphics processor capable of reading from, and writing to, virtual memory. The invention provides a graphics processing unit which includes, among other things, an graphic processor in the form of an address generator which retrieves data from memory locations, and writes data to memory locations. The address generator retrieves data from memory locations memory access request directly to a memory control unit, which retrieves the contents of the memory location. Prior to issuing the request, the address generator sends the address to a virtual translation unit, which translates the virtual address to a physical address. The virtual translation/FIFO control unit also contains three translation buffers, in which are stored the most recently accessed virtual addresses, which, in many situations, enables the virtual translation/FIFO control unit to translate the virtual address using less memory accesses.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.