Colyn S. Case
27Patents
20h-index
39Co-inventors
85Inventor score
Filing activity: Aug 21, 1991 → Jan 28, 2015
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US5321806A | Method and apparatus for transmitting graphics command in a computer graphics system | Physics | 106 | Expired |
| US5911051A | High-throughput interconnect allowing bus transactions based on partial access requests | Physics | 98 | Expired |
| US7334108B1 | Multi-client virtual address translation system with translation units of variable-range size | Physics | 83 | Expired |
| US5321810A | Address method for computer graphics system | Physics | 74 | Expired |
| US7278008B1 | Virtual address translation system with caching of variable-range translation clusters | Physics | 70 | Expired |
| US5315698A | Method and apparatus for varying command length in a computer graphics system | Physics | 68 | Expired |
| US7386697B1 | Memory management for virtual address space with translation units of variable range size | Physics | 56 | Active |
| US7469311B1 | Asymmetrical bus | Emerging Cross-Sectional Technologies | 52 | Active |
| US5313577A | Translation of virtual addresses in a computer graphics system | Physics | 47 | Expired |
| US5315696A | Graphics command processing method in a computer graphics system | Physics | 45 | Expired |
| US7296139B1 | In-memory table structure for virtual address translation system with translation units of variable range size | Physics | 45 | Expired |
| US7415575B1 | Shared cache with client-specific replacement policy | Physics | 36 | Active |
| US6097402A | System and method for placement of operands in system memory | Physics | 36 | Expired |
| US6317803A | High-throughput interconnect having pipelined and non-pipelined bus transaction modes | Physics | 34 | Expired |
| US7624221B1 | Control device for data stream optimizations in a link interface | Physics | 34 | Active |
| US6044419A | Memory handling system that backfills dual-port buffer from overflow buffer when dual-port buffer is no longer full | Physics | 33 | Expired |
| US7526593B2 | Packet combiner for a packetized bus with dynamic holdoff time | Emerging Cross-Sectional Technologies | 30 | Active |
| US6820173B1 | Data prefetcher with predictor capabilities | Physics | 28 | Expired |
| US7562205B1 | Virtual address translation system with caching of variable-range translation clusters | Physics | 23 | Active |
| US8341380B2 | Efficient memory translator with variable size cache line coverage | Physics | 20 | Active |
| US7797510B1 | Memory management for virtual address space with translation units of variable range size | Physics | 11 | Active |
| US8161252B1 | Memory interface with dynamic selection among mirrored storage locations | Physics | 11 | Active |
| US7788439B1 | Asymmetrical bus for bus link width optimization of a graphics system | Emerging Cross-Sectional Technologies | 11 | Active |
| US7664905B2 | Page stream sorter for poor locality access patterns | Physics | 7 | Active |
| US8035647B1 | Raster operations unit with interleaving of read and write requests using PCI express | Physics | 3 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.