Patent · US Expired

Process for the production of a high voltage MIS integrated circuit

US5314832A · kind A · utility

45Cited by
2References
17Claims
0Family size

Assignee

Inventor

Key dates

Filing dateFeb 12, 1992
Grant dateMay 24, 1994
Priority date
Expiry dateFeb 12, 2012

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10D64/017

Abstract

A process for the production of a high voltage, MIS integrated circuit or a substrate incorporating double implantation MIS transistors creates transistors whose sources and drains consist of double junctions and whose gates are formed in a semiconducting layer. The initial process includes a first implantation of ions of a given conductivity type in the substrate and at a given dose, in order to form there the first source and drain junctions, followed by a second implantation of ions of the same type as the first, at a higher dose than that of the first implantation in order to form the double junctions. The process is characterized in that between the first and second implantations, a conductive layer is epitaxied on said first junctions and on the gates, the second implantation being formed through the epitaxied layer in such a way that the double junctions are partly formed there.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.