Non-volatile semiconductor memory cell

US5317179A · kind A · utility

Assignee

• INTEGRATED SILICON SOLUTION INC. · US

Inventors

• Ling Chen · Sunnyvale, US
• Tien-Ler Lin · Saratoga, US
• Albert Wu · Taipei, TW

Key dates

• Filing date: Sep 23, 1991
• Grant date: May 31, 1994
• Expiry date: Sep 23, 2011

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10B69/00

Abstract

Disclosed is a flash EEPROM cell needing only a 5 volt external source using an on-chip voltage multiplier circuit to provide high voltages necessary to effect Fowler-Nordheim tunneling during both the program and erase modes. Properties of dielectric layers between a floating gate and a control gate and between the floating gate and a drain region differ to facilitate programming and erasing of the floating gate. Also disclosed is a method for producing a flash EEPROM cell by forming the insulative layer between a floating gate and a control gate to have a capacitance lower than the capacitance of the insulating layer between the floating gate and a drain region.