Multiple caches using state information indicating if cache line was previously modified and type of access rights granted to assign access rights to cache line
US5317716A · kind A · utility
57Cited by
16References
8Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Aug 20, 1992 |
| Grant date | May 31, 1994 |
| Priority date | — |
| Expiry date | Aug 20, 2012 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F12/0822
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method for increasing cache concurrency in a multiprocessor system. In a multiprocessor system having a plurality of processors each having a local cache in order to increase concurrency the directory entry for a line in local cache will be assigned an LCH bit for locally changed status. If the last cache to hold the line had made a change to it this bit will be set on. If not, the bit will be off and thereby allow the receiving or requesting cache to make change to the line without requiring a main storage castout.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.