Method of manufacturing a semiconductor device
US5328860A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Apr 15, 1993 |
| Grant date | Jul 12, 1994 |
| Priority date | — |
| Expiry date | Apr 15, 2013 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S148/009
Abstract
A method for manufacturing BiCMOS semiconductor devices in which an oxide layer formed on the surface of a semiconductor substrate for the purpose of facilitating formation of spacers adjacent to sidewalls of the gates of the MOS transistors thereof is only partially removed, by using a dry etching process, to thereby leave a residual oxide layer, which is then removed, by using a wet etching process, to thereby form the spacers. Alternatively, all portions of the oxide layer except a portion thereof overlying the base-emitter region of the bipolar transistor of the BiCMOS device is removed, thereby precluding the necessity of etching the oxide layer away at the base-emitter junction. In either case, the DC forward current gain Hfe and linearity of the bipolar transistor of the BiCMOS device are enhanced.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.