Complementary macrocell feedback circuit
US5329181A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Mar 5, 1993 |
| Grant date | Jul 12, 1994 |
| Priority date | — |
| Expiry date | Mar 5, 2013 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/17704
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
In a programmable logic device having I/O blocks and logic blocks, two lines leading from a region including a logic block and an I/O block alternately provide a logic block output signal and its complement or a logic block output signal and an I/O block input signal. A multiplexer selects between providing on a line leading from an I/O block to an interconnect structure a first signal which is provided by the I/O block when the I/O block is an input buffer and a second signal which is the inverse of a logic signal provided to the I/O block when the I/O block is not an input buffer. Thus in one case two lines which extend from the I/O block to the interconnect structure may carry PA1 a) a logic block output signal and PA1 b) an I/O block output signal; and in the other case carry PA1 a) a logic block output signal and PA1 b) the inverse of the logic block output signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.