Semiconductor process for manufacturing semiconductor devices with increased operating voltages
US5330922A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Sep 25, 1989 |
| Grant date | Jul 19, 1994 |
| Priority date | — |
| Expiry date | Sep 25, 2009 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S257/929
Abstract
A method of manufacturing semiconductor devices with increased operating voltages is described. A dopant of a second conductivity type is implanted into a region of a first epitaxial layer of the first conductivity type to form a buried layer. A substantially smaller dosage of a faster-diffusing dopant of the second conductivity type is then implanted into the buried layer region. The second epitaxial layer of the first conductivity type is formed over the first epitaxial layer. A region of the second epitaxial layer overlying the doped region of the first epitaxial layer is implanted with a dopant of the second conductivity type and diffused to form a doped well. The faster-diffusing dopant diffuses upward to make good electrical contact with the doped well diffusing downward from the surface. The lateral diffusion of the faster-diffusing dopant can be contained, so that lateral spacing design rules do not have to be increased. A thicker second epitaxial layer can thus be used, resulting in increased operating voltage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.