John P. Erdeljac
22Patents
14h-index
32Co-inventors
81Inventor score
Filing activity: Nov 13, 1987 → Nov 26, 2014
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US6144100A | Integrated circuit with bonding layer over active circuitry | Electricity | 162 | Expired |
| US6683380B2 | Integrated circuit with bonding layer over active circuitry | Electricity | 140 | Expired |
| US6236101A | Metallization outside protective overcoat for improved capacitors and inductors | Electricity | 98 | Expired |
| US6424005B1 | LDMOS power device with oversized dwell | Electricity | 94 | Expired |
| US5489547A | Method of fabricating semiconductor device having polysilicon resistor with low temperature coefficient | Emerging Cross-Sectional Technologies | 70 | Expired |
| US5171699A | Vertical DMOS transistor structure built in an N-well CMOS-based BiCMOS process and method of fabrication | Electricity | 51 | Expired |
| US5554873A | Semiconductor device having polysilicon resistor with low temperature coefficient | Emerging Cross-Sectional Technologies | 33 | Expired |
| US5317180A | Vertical DMOS transistor built in an n-well MOS-based BiCMOS process | Electricity | 31 | Expired |
| US4805071A | High voltage capacitor for integrated circuits | Emerging Cross-Sectional Technologies | 30 | Expired |
| US5330922A | Semiconductor process for manufacturing semiconductor devices with increased operating voltages | Emerging Cross-Sectional Technologies | 25 | Expired |
| US5719421A | DMOS transistor with low on-resistance and method of fabrication | Electricity | 24 | Expired |
| US4994887A | High voltage merged bipolar/CMOS technology | Electricity | 19 | Expired |
| US5825065A | Low voltage DMOS transistor | Electricity | 17 | Expired |
| US6284617A | Metalization outside protective overcoat for improved capacitors and inductors | Electricity | 15 | Expired |
| US5436179A | Semiconductor process for manufacturing semiconductor devices with increased operating voltages | Emerging Cross-Sectional Technologies | 10 | Expired |
| US5408125A | Semiconductor process for manufacturing semiconductor device with increased operating voltages | Emerging Cross-Sectional Technologies | 8 | Expired |
| US6153451A | Transistor with increased operating voltage and method of fabrication | Electricity | 8 | Expired |
| US6025231A | Self aligned DMOS transistor and method of fabrication | Electricity | 7 | Expired |
| US5576233A | Method for making an EEPROM with thermal oxide isolated floating gate | Electricity | 6 | Expired |
| US6284669A | Power transistor with silicided gate and contacts | Electricity | 5 | Expired |
| US6534364B1 | Tunnel diode layout for an EEPROM cell for protecting the tunnel diode region | Emerging Cross-Sectional Technologies | 5 | Expired |
| US9431286B1 | Deep trench with self-aligned sinker | Electricity | 4 | Active |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.