Method for fabricating GaInP/GaAs structures
US5330932A · kind A · utility
10Cited by
6References
24Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Dec 31, 1992 |
| Grant date | Jul 19, 1994 |
| Priority date | — |
| Expiry date | Dec 31, 2012 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S148/011
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
In one form of the invention, a method is disclosed for removing portions of successive layers of GaAs 34 and GaInP 32 comprising the steps of: performing an anisotropic reactive ion etch on the GaAs layer; and performing an isotropic wet etch on the GaInP layer, whereby a mesa formed as a result of the reactive ion etch and the wet etch has substantially vertical sidewalls, and further whereby GaInP/GaAs structures having dimensions of less than approximately 3.0 .mu.m may be fabricated.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.