Method of forming a semiconductor device which prevents field concentration
US5334546A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Feb 22, 1993 |
| Grant date | Aug 2, 1994 |
| Priority date | — |
| Expiry date | Feb 22, 2013 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/112
Abstract
There is provided p diffusion regions (18a, 18b) in the surface of an end portion of the n island (7) formed on the p.sup.- substrate (12). The insulation film (14) is formed on the n island (7) to form therein conductive plates (16a-16e). The p diffusion regions (18a, 18b) and, the conductive plates (16a-16e) are alternately arranged and so aligned that adjacent pairs of end portions thereof overlap with each other. Capacitances of capacitive coupling of the conductive plates (16a-16e) and the p diffusion regions (18a, 18b) are optimized so that potentials of the conductive plates (16a-16e) and the p diffusion regions (18a, 18b) can substantially linearly change from a low level to a high level. Thus, the concentration of electric field can be prevented.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.