Structure and method for multiplexing pins for in-system programming
US5336951A · kind A · utility
91Cited by
7References
2Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Aug 13, 1993 |
| Grant date | Aug 9, 1994 |
| Priority date | — |
| Expiry date | Aug 13, 2013 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F30/34
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A structure and method for in-system programming of a programmable logic device are provided. The in-system programming structure provides one dedicated pin for in-system programming function, additional in-system programming pins are multiplexed with programmable input/output pins used in functional operations. When an enable signal is received at the dedicated pin, the multiplexed pins relinquish their roles as programmable input/output pin to become in-system programming pins. A state machine controls the programming steps. The in-system programming structure can be cascaded in a "daisy chain" fashion.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.