Block erasable flash EEPROM apparatus and method thereof
US5339279A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | May 7, 1993 |
| Grant date | Aug 16, 1994 |
| Priority date | — |
| Expiry date | May 7, 2013 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/30
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A block erasable flash EEPROM (22) having a single array (68) which can be partitioned into one or more blocks (50-57). The same column decode/block select circuitry (66) is used to provide both column select signals (71) and block select signals (73). The number of blocks (50-57) and the size of each block (50-57) can be determined by the manufacturer during the manufacturing process. Each block (50-57) has a corresponding charge pump (80-87). Each charge pump (80-87) is capable of erasing a single block within the array (68). Each charge pump (80-87) has a variable capacitor (90-97). Each of the variable capacitors (90-97) can be sized according to the size of its corresponding block (50-57).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.