Ones counting circuit, utilizing a matrix of interconnected half-adders, for counting the number of ones in a binary string of image data
US5339447A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Nov 17, 1989 |
| Grant date | Aug 16, 1994 |
| Priority date | — |
| Expiry date | Nov 17, 2009 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F7/607
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
In an imaging system (5310), a histogram of images may be made by counting the number of "one" pixels in a matrix of image pixels. A ones counting circuit (5320) is provided to produce a binary number Y indicative of the number of "ones" in an input binary string X. The circuit (5320) comprises a matrix (5424) of counting cells (5426) arranged and interconnected in rows and columns. Each of the counting cells (5426) includes an AND gate (5428) coupled to an exclusive-OR (XOR) gate (5430). A binary string having X.sub.N bits may be thus counted employing a matrix having M rows, where M=log2(X.sub.N +1) rounded up to the nearest integer and N columns. An alternative embodiment employs a minimized matrix. This minimized matrix has M rows, where M=log2(X.sub.N +1) rounded up to the nearest integer. The minimized matrix has N=X.sub.N -2.sup.r elements in each row, where r is the row number ranging from zero for the first row to (M-1) for the last row.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.