Preprogramming testing in a field programmable gate array
US5347519A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Dec 3, 1991 |
| Grant date | Sep 13, 1994 |
| Priority date | — |
| Expiry date | Dec 3, 2011 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2201/88
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A field programmable gate array integrated circuit which has numerous features for testing prior to programming the antifuses in the integrated circuit is provided. The circuits used to program the antifuses are also used for much of the preprogramming testing. The functionality of continuous series transistors and latch logic blocks may be tested together with the continuity of their programmable connections. Programmable input/output buffer circuits and clock circuits which set the desired clock network paths may be tested with signals on a serial scan path which passes through the input/output buffer circuits and clock circuits. Process characterization tests without the requirement of high-speed test equipment are also provided.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.