Christopher E. Phillips
27Patents
16h-index
18Co-inventors
74Inventor score
Filing activity: Jun 21, 1991 → May 8, 2009
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US5970254A | Integrated processor and programmable data path chip for reconfigurable computing | Physics | 292 | Expired |
| US6282627A | Integrated processor and programmable data path chip for reconfigurable computing | Physics | 279 | Expired |
| US5966534A | Method for compiling high level programming languages into an integrated processor with reconfigurable logic | Physics | 216 | Expired |
| US6298472A | Behavioral silicon construct architecture and mapping | Physics | 136 | Expired |
| US6349346B1 | Control fabric unit including associated configuration memory and PSOP state machine adapted to provide configuration address to reconfigurable functional unit | Physics | 109 | Expired |
| US6389579B1 | Reconfigurable logic for table lookup | Physics | 106 | Expired |
| US5221865A | Programmable input/output buffer circuit with test capability | Electricity | 103 | Expired |
| US6288566A | Configuration state memory for functional blocks on a reconfigurable chip | Electricity | 102 | Expired |
| US5347519A | Preprogramming testing in a field programmable gate array | Physics | 102 | Expired |
| US6311200A | Reconfigurable program sum of products generator | Electricity | 98 | Expired |
| US6708325B2 | Method for compiling high level programming languages into embedded microprocessor with multiple reconfigurable logic | Physics | 93 | Expired |
| US5534798A | Multiplexer with level shift capabilities | Electricity | 60 | Expired |
| US6237074A | Tagged prefetch and instruction decoder for variable length instruction set and method of operation | Physics | 55 | Expired |
| US5623501A | Preprogramming testing in a field programmable gate array | Physics | 21 | Expired |
| US5671234A | Programmable input/output buffer circuit with test capability | Electricity | 20 | Expired |
| US5699506A | Method and apparatus for fault testing a pipelined processor | Physics | 18 | Expired |
| US5887002A | Preprogramming testing in a field programmable gate array | Physics | 10 | Expired |
| US5546353A | Partitioned decode circuit for low power operation | Physics | 7 | Expired |
| US5617543A | Non-arithmetical circular buffer cell availability status indicator circuit | Physics | 7 | Expired |
| US5598112A | Circuit for generating a demand-based gated clock | Electricity | 7 | Expired |
| US5652527A | Input-output circuit for increasing immunity to voltage spikes | Electricity | 5 | Expired |
| US7705624B2 | Fault tolerant integrated circuit architecture | Electricity | 3 | Active |
| US7880497B2 | Fault tolerant integrated circuit architecture | Emerging Cross-Sectional Technologies | 2 | Active |
| US7812629B2 | Resilient integrated circuit architecture | Electricity | 2 | Active |
| US7502920B2 | Hierarchical storage architecture for reconfigurable logic configurations | Physics | 0 | Expired |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.