Apparatus and method of data transfer between systems using different clocks
US5347559A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Dec 30, 1992 |
| Grant date | Sep 13, 1994 |
| Priority date | — |
| Expiry date | Dec 30, 2012 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03L7/089
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
According to one aspect of the invention, an apparatus includes a first processor coupled to a first system bus to provide data to a cache and a memory, and a second processor coupled to the first system bus and a second abbreviated system bus to receive read data from said first system bus. In accordance with a further aspect of the invention, an apparatus includes means for correcting errors in memory. In accordance with a further aspect of the invention, an apparatus includes a number of computing systems each including a memory device mounted on an infrequently replaced hardware unit, and capable of communicating with the number of computing systems. In accordance with another aspect of the invention, an apparatus includes a counter, means for detecting a selected state of said counter, and means, responsive to output signals from said counter, for selectively permitting or inhibitting transfer of data fed to a recirculating state device. In accordance with a further aspect of the invention, an apparatus includes a first means for providing a first clocking signal, a second means for providing a second clocking signal, means for providing an error signal responsive to an offset…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.