NPN heterojunction bipolar transistor including antimonide base formed on semi-insulating indium phosphide substrate
US5349201A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | May 28, 1992 |
| Grant date | Sep 20, 1994 |
| Priority date | — |
| Expiry date | May 28, 2012 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/824
Abstract
A heterojunction bipolar transistor (HBT) (10,30) includes an indium-gallium-arsenide (InGaAs), indium-phosphide (InP) or aluminum-indium-arsenide (AlInAs) collector layer (14) formed over an indium-phosphide (InP) substrate (12). A base layer (16,32) including gallium (Ga), arsenic (As) and antimony (Sb) is formed over the collector layer (14), and an AlInAs or InP emitter layer (18) is formed over the base layer (16,32). The base layer may be ternary gallium-arsenide-antimonide (GaAsSb) doped with beryllium (Be) (16), or a strained-layer-superlattice (SLS) structure (32) including alternating superlattice (32b,32a) layers of undoped gallium-arsenide (GaAs) and P-doped gallium-antimonide (GaSb). The GaSb superlattice layers (32a) are preferably doped with silicon (Si), which is much less diffusive than Be.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.