EEPROM-backed FIFO memory
US5353248A · kind A · utility
55Cited by
12References
17Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Apr 14, 1992 |
| Grant date | Oct 4, 1994 |
| Priority date | — |
| Expiry date | Apr 14, 2012 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C14/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A first-in, first-out (FIFO) static random access memory (SRAM) device includes EEPROM cells which provide non-volatile backup capability. The sizing of each SRAM cell is such that its associated EEPROM cell is automatically programmed via the output of the SRAM cell. Upon power-up, the EEPROM cell restores the SRAM cell to the inverse of whatever state it was in prior to the most recent EEPROM programming (before a preceding power-down). This provides non-volatility to the SRAM without a significant increase in manufacturing costs or overhead.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.