Distributed VCC/VSS ESD clamp structure
US5361185A · kind A · utility
30Cited by
3References
3Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Feb 19, 1993 |
| Grant date | Nov 1, 1994 |
| Priority date | — |
| Expiry date | Feb 19, 2013 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH02H3/05
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A distributed VCC/VSS clamp structure (10) for preventing inadvertent damage to semiconductor integrated circuits caused by an electrostatic discharging event occurring between any two external pins thereof includes a clamp transistor (Q4) which is disposed locally to every ESD protection circuitry associated with each input and output pin of a semiconductor integrated circuit. The clamp transistor is activated so as to provide a secondary discharging path when the direct clamp discharging paths of the ESD protection circuitry are not forming a complete path.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.