Gain-stable NPN heterojunction bipolar transistor
US5365077A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jan 22, 1993 |
| Grant date | Nov 15, 1994 |
| Priority date | — |
| Expiry date | Jan 22, 2013 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D10/821
Abstract
A gain-stable npn heterojunction bipolar transistor includes a graded superlattice between its base and emitter consisting of multiple discrete periods, with each period having a layer of base material and another layer of emitter material. The thicknesses of the base material layers decrease while the thicknesses of the emitter material layers increase in discrete steps for each successive period from the base to the emitter. The thickness of each period is preferably at least about 20 Angstroms, with the superlattice including more than five periods. The superlattice is preferably doped to establish an electrical base-emitter junction at a desired location. The graded superlattice inhibits the diffusion of beryllium p dopant from the base into the emitter during transistor operation, thus stabilizing the device's gain and turn-on voltage.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.