Low cost, thermally efficient, and surface mountable semiconductor package for a high applied power VLSI die
US5367193A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Jun 17, 1993 |
| Grant date | Nov 22, 1994 |
| Priority date | — |
| Expiry date | Jun 17, 2013 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/1532
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A substrate, a heat slug with an access cavity, a lid, and a heat sink having a stem are used to package a high applied power VLSI die. The substrate comprises a stepped housing cavity at its center, and a number of electrical contacts disposed at its underside. The inactive side of the high applied power VLSI die, the top surface and underside openings of the stepped housing cavity of the substrate, the heat slug including its access cavity, the stem of the heat sink, and the lid are coordinated in their sizes and geometric locations in view of the applied power and the heat transfer efficiency of the heat sink. As a result, sufficient heat is directly transferred away from the high applied power VLSI die through only one layer of thermal adhesive material, thereby keeping the temperature in the stepped housing cavity of the substrate from rising above an unacceptable threshold, and yet the semiconductor package can still be assembled using industry standard unmodified wire bonding and surface mount equipment.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.