Programmable high endurance block for EEPROM device
US5367484A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Apr 1, 1993 |
| Grant date | Nov 22, 1994 |
| Priority date | — |
| Expiry date | Apr 1, 2013 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C16/3495
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An erasable programmable memory device has a number of data storage blocks. Each block has an endurance characteristic that at least roughly defines the number of times data may be erased from and written to the block before it wears out in that data cannot then be further erased from and written to the block. A redundant data storage block of memory capacity and endurance similar to that of each of the other data storage blocks is disposed in parallel with a selected one of the latter for which higher endurance is desired. This enables identical data to be written simultaneously to the two blocks and thus considerably increases the endurance of the selected block by virtue of the fact that identical memory cells in both blocks must fail before the endurance of the selected block will be depleted. After the selected block has been designated for high endurance and placed in parallel with the redundant block, a fuse may be set to prevent alteration of that designation.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.