Method and system for enhanced branch history prediction accuracy in a superscalar processor system
US5367703A · kind A · utility
Assignee
Inventor
Key dates
| Filing date | Jan 8, 1993 |
| Grant date | Nov 22, 1994 |
| Priority date | — |
| Expiry date | Jan 8, 2013 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F9/3844
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method and system for enhanced branch history prediction accuracy in a superscalar processor system by maintaining branch history tables which include a separate branch history for each instruction fetch position within a multi-instruction access. In a superscalar processor system which is capable of accessing multiple instructions simultaneously, a branch history table is established which includes a predictive field for each possible instruction fetch position within a multi-instruction access. Each group of predictive fields is accessed within the branch history table utilizing a portion of the instruction fetch address, such as the low order address bits. A particular predictive field within the group is then selected which corresponds to the position of the branch instruction within the instruction fetch. The content of the selected predictive field is then utilized to predict whether or not a branch is taken for the corresponding branch instruction. Each predictive field preferably comprises a two bit binary counter which is incremented or decremented in response to a branch being "taken" or "not taken" and then stored again within the branch history table.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.