Multi-processor having control over synchronization of processors in mind mode and method of operation
US5371896A · kind A · utility
171Cited by
11References
27Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | May 17, 1993 |
| Grant date | Dec 6, 1994 |
| Priority date | — |
| Expiry date | May 17, 2013 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F15/8015
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
There is disclosed a multiprocessor system arranged, in one embodiment, as an image and graphics processor. The processor is structured with several individual processors all having communication links to several memories without restriction. A crossbar switch serves to establish the processor memory links. The entire image processor, including the individual processors, the crossbar switch and the memories are contained on a single silicon chip. Each processor can operate to execute the same instruction at the same time (SIMD mode) or different instructions at the same time (MIMD mode).
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.