Method for fabricating MOS transistor
US5374575A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Nov 23, 1993 |
| Grant date | Dec 20, 1994 |
| Priority date | — |
| Expiry date | Nov 23, 2013 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D30/0217
Abstract
A method for fabricating an LDD MOS transistor having an improved structure capable of simplifying the fabrication and improving characteristics of the transistor. The methods includes the steps of forming a field oxide film for an active region isolation on a silicon substrate, thickly depositing an oxide film and etching the thick oxide film to form a first opening over an active region, forming side wall spacers in the first opening, implanting p type impurity ions in the silicon substrate through the first opening to form a channel region, filling the first opening with a first polysilicon film, removing the spacers to form second openings respectively in both sides of the first polysilicon film, implanting n type impurity ions in the silicon substrate through the second openings to form low concentration source and drain regions respectively disposed adjacent to both lateral ends of the channel region, removing the first polysilicon film to form a third opening, growing an oxide film over the resulting structure to form a gate oxide film, filling the third opening with a second polysilicon film, patterning the gate oxide film, and implanting n type impurity ions in the silicon…
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.