Process for forming an electrically programmable read-only memory cell

US5382540A · kind A · utility

Assignee

• Motorola, Inc. · US

Inventors

• Umesh Sharma · San Jose, US
• Hisao Kawasaki · Yokohama, JP

Key dates

• Filing date: Sep 20, 1993
• Grant date: Jan 17, 1995
• Expiry date: Sep 20, 2013

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10B69/00

Abstract

An electrically programmable read-only memory cell includes a single crystal silicon pillar having the active region of the memory cell. A memory array of the cells may be configured to act as an EPROM array, an EEPROM array, or a flash EEPROM array. A silicon spacer lies adjacent to each of the silicon pillars and acts as a floating gate for its particular memory cell. A memory cell may have a cell area that is less than one square micron. In an EPROM or a flash EEPROM array, no field isolation is required between the memory cells within the array. Processes for forming the memory cells and the memory array are disclosed.