Superconductor-semiconductor hybrid memory circuits with superconducting three-terminal switching devices
US5388068A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Oct 14, 1993 |
| Grant date | Feb 7, 1995 |
| Priority date | — |
| Expiry date | Oct 14, 2013 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S505/841
Abstract
Superconducting-semiconducting hybrid memories are disclosed. These superconducting-semiconducting hybrid memories utilize semiconductor circuits to store information, and either superconducting or semiconducting or combinations of superconducting and semiconducting circuits, with at least some superconducting circuitry used, to write and read information. The state of memory cells in the hybrid memories is determined by utilizing superconductor current sensing schemes to detect currents in the bit-line, thereby avoiding any bit-line charging delays and other problems associated with purely semiconductor memories. Additional features of the superconducting-semiconducting hybrid memories include wide margins, dense packing of memory cells, low power dissipation and fast access times. Interface curcuitry for converting superconducting signals to signals compatible with semiconductor circuits and for converting semiconductor signals to signals compatible with superconducting circuits is also disclosed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.