High-speed semiconductor device with graded collector barrier
US5389798A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Oct 1, 1992 |
| Grant date | Feb 14, 1995 |
| Priority date | — |
| Expiry date | Oct 1, 2012 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S977/936
- WIPO fieldMicro-structural and nano-technology
- WIPO sectorChemistry
Abstract
A high-speed semiconductor device includes an emitter layer serving as an injection source of hot electrons and a collector barrier layer disposed between a base layer and a collector layer. The potential profile of the collector barrier layer gradually varies from a region in the vicinity of the boundary between the base layer and the collector barrier layer whereby reflection of electrons at the collector barrier layer is significantly reduced. Therefore, current density in the ON state of the device is increased without damaging the high speed characteristics of the device, and current density in the OFF state of the device is decreased, resulting in a high-performance and high-speed semiconductor device.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.