Process for manufacturing semiconductor components

US5393711A · kind A · utility

Assignee

• Robert Bosch GmbH · DE

Inventors

• Vesna Biallas · Reutlingen, DE
• Herbert Goebel · Gräfelfing, DE
• Richard Spitz · Reutlingen, DE

Key dates

• Filing date: Apr 12, 1994
• Grant date: Feb 28, 1995
• Expiry date: Apr 12, 2014

Classification

• Technology area (CPC Y): Emerging Cross-Sectional Technologies
• CPC primary: Y10S148/135
• WIPO field: Semiconductors
• WIPO sector: Electrical engineering

Abstract

A process for manufacturing semiconductor components, especially diodes. The process entails first bonding two semiconductor wafers of different conducting types (p and n), according to a silicon-fusion bonding process (SFB), thereby forming a bonded wafer assembly with a p-n junction. The bonded wafers are then partitioned into a plurality of semiconductor elements by the cutting of grooves into the bonded wafers to a depth which extends at least to the p-n junction. Each of the plurality of semiconductor elements thus formed has an individual p-n junction with sides exposed by the grooves. The sides of the semiconductor elements are then subjected to etching and passivation. The upper and lower surfaces of the bonded wafer assembly are then metal-coated. Finally, the semiconductor elements are separated from each other by a sawing operation.