Nonvolatile semiconductor memory device having reduced resistance value for the common source wiring region
US5394001A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | May 25, 1993 |
| Grant date | Feb 28, 1995 |
| Priority date | — |
| Expiry date | May 25, 2013 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B69/00
Abstract
Field oxide films are formed on a semiconductor substrate of first conductivity type to be spaced from each other in the stripe shape. Gate insulating films are formed on the semiconductor substrate between the field oxide films. Word lines or control gate electrodes are formed on the field oxide films and the gate insulating films to be spaced from each other in the stripe shape along a direction perpendicular to the field oxide films. Grooves are formed in the gate insulating films and the field oxide films in regions sandwiched by the word lines. Source regions of second conductivity type are formed in the semiconductor substrate in the grooves formed in the gate insulating films. A common source wiring region of second conductivity type for electrically connecting the respective source regions is formed in the semiconductor substrate in the grooves formed in the field oxide films. The impurity concentration of the common source wiring region is higher than that of the source regions, and the diffusion depth of the common source wiring region is deeper than that of the source regions.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.