Structure and method for providing prioritized arbitration in a dual port memory
US5398211A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Oct 14, 1993 |
| Grant date | Mar 14, 1995 |
| Priority date | — |
| Expiry date | Oct 14, 2013 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C8/16
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An integrated circuit dual port memory provides a preferred port which is always granted priority of memory access when memory access requests arrive simultaneous from both ports of the dual port memory. To implement this priority scheme, the memory request signal from the preferred port controls a multiplexor to select the input signals from the preferred port over the input signals from the non-preferred port. The memory request signal from the preferred port also serves as a busy signal to block a simultaneous memory access by the non-preferred port. In one embodiment, memory request signals of both ports are latched into registers clocked by the same clock signal.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.