Process for high density interconnection of substrates and integrated circuit chips containing sensitive structures
US5401687A · kind A · utility
27Cited by
13References
30Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Apr 15, 1993 |
| Grant date | Mar 28, 1995 |
| Priority date | — |
| Expiry date | Apr 15, 2013 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/15787
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
In a method for preserving an air bridge structure on an integrated circuit chip used in an overlay process, a patternable protective layer is applied for providing mechanical strength to prevent deformation during subsequent processing. A polymeric film layer is applied over the chip and protective layer, and interconnections are fabricated through the polymeric film layer. The polymeric film layer is removed from the area over the air bridge structure. The patternable protective layer is then removed, leaving the resultant structure with an undamaged air bridge which is free of residue.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.