Low dielectric constant interconnect for multichip modules
US5402003A · kind A · utility
6Cited by
1References
16Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 12, 1993 |
| Grant date | Mar 28, 1995 |
| Priority date | — |
| Expiry date | Nov 12, 2013 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2201/0715
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A substrate applicable to be used in a multichip module including a plurality of integrated circuits. The substrate includes a series of interrelated metal layers, ceramic layers and lattice structures formed by the ceramic layers. The metal layers provide ground planes, power planes and interconnects for the integrated circuit. The lattice structure consists of a series of ceramic regions separating the ceramic layers such that the majority of the lattice structure is air in order to reduce the effective dielectric constant of the substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.