Fuse selectable timing signals for internal signal generators
US5402390A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Oct 4, 1993 |
| Grant date | Mar 28, 1995 |
| Priority date | — |
| Expiry date | Oct 4, 2013 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/4076
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Switching circuits controlled by a fuse that can be blown after testing the DRAM part select the timing signals coupled from a binary counter to internal signal generator circuits. The internal Circuits control self refresh in this embodiment. The decision to leave the fuse intact or blow the fuse rests on the test results obtained from each part and can vary depending upon maturity of the manufacturing process, the pause test results obtained and whether a low power part is desired. The fuse is affected after fabrication of the chip and at the same time as other fuses used for redundancy. This provides another degree of freedom in the manufacture of integrated circuits.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.