Scott E. Smith
80Patents
13h-index
65Co-inventors
87Inventor score
Filing activity: Jan 31, 1992 → May 25, 2023
Most-cited inventions
| Patent | Title | Area | Cited by | Status |
|---|---|---|---|---|
| US6242936A | Circuit for driving conductive line and testing conductive line for current leakage | Physics | 85 | Expired |
| US5295101A | Array block level redundancy with steering logic | Physics | 45 | Expired |
| US6586979B2 | Method for noise and power reduction for digital delay lines | Electricity | 32 | Expired |
| US5402390A | Fuse selectable timing signals for internal signal generators | Physics | 31 | Expired |
| US5706234A | Testing and repair of wide I/O semiconductor memory devices designed for testing | Physics | 29 | Expired |
| US5410510A | Process of making and a DRAM standby charge pump with oscillator having fuse selectable frequencies | Physics | 27 | Expired |
| US5511025A | Write per bit with write mask information carried on the data path past the input data latch | Physics | 26 | Expired |
| US6118323A | Electrostatic discharge protection circuit and method | Physics | 20 | Expired |
| US6191644A | Startup circuit for bandgap reference circuit | Physics | 19 | Expired |
| US6737897B2 | Power reduction for delay locked loop circuits | Electricity | 19 | Expired |
| US7177208B2 | Circuit and method for operating a delay-lock loop in a power saving manner | Physics | 18 | Expired |
| US6134168A | Circuit and method for internal refresh counter | Electricity | 14 | Expired |
| US5999473A | Circuit and method for internal refresh counter | Physics | 13 | Expired |
| US7123522B2 | Method and apparatus for achieving low power consumption during power down | Physics | 12 | Expired |
| US6868019B2 | Reduced power redundancy address decoder and comparison circuit | Physics | 10 | Expired |
| US6546510B1 | Burn-in mode detect circuit for semiconductor device | Physics | 10 | Expired |
| US7729191B2 | Memory device command decoding system and memory device and processor-based system using same | Physics | 10 | Active |
| US7613060B2 | Methods, circuits, and systems to select memory regions | Emerging Cross-Sectional Technologies | 9 | Active |
| US6529422B1 | Input stage apparatus and method having a variable reference voltage | Physics | 7 | Expired |
| US8665663B2 | Memory circuit and control method thereof | Physics | 6 | Active |
| US6809970B2 | Input stage apparatus and method having a variable reference voltage | Physics | 5 | Expired |
| US11042436B2 | Semiconductor device with modified access and associated methods and systems | Physics | 5 | Active |
| US5469385A | Output buffer with boost from voltage supplies | Physics | 5 | Expired |
| US8519767B2 | Methods, apparatuses, and circuits for bimodal disable circuits | Electricity | 4 | Active |
| US6201752A | Timing circuit for high voltage testing | Physics | 4 | Expired |
Source: USPTO / EPO open patent data. Inventor disambiguation is heuristic; counts are objective bibliographic measures.