Patent · US Expired

Method of fabricating a thin film transistor

US5403761A · kind A · utility

12Cited by
5References
9Claims
0Family size

Assignee

Inventor

Key dates

Filing dateApr 26, 1994
Grant dateApr 4, 1995
Priority date
Expiry dateApr 26, 2014

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10D30/6717

Abstract

This invention relates to the Thin Film Transistor having the self-aligned diffused source/drain regions for improving the ratio of on to off current and the method of fabricating the same. The method of making TFT comprising the steps of forming a gate electrode around a central portion of a substrate, forming a gate insulating layer over the substrate and covering the gate electrode, forming a semiconductor layer on the gate insulating layer, forming sidewall spacers on stepped potions of the first semiconductor layer near both sides of the gate electrode, forming a doped semiconductor layer over the whole surface of the substrate, patterning the second semiconductor layer to form one of the patterned second semiconductor layers formed over the first semiconductor layer and apart from the one sidewall spacer near one side of the gate electrode, and the other formed over the first semiconductor layer and the other sidewall spacer near the other side of the gate electrode, and diffusing the impurity in the second semiconductor layer through the anneal process to form highly doped impurity regions in the underlying first semiconductor layer.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.