Patent · US Expired

Electrical junction device with lightly doped buffer region to precisely locate a p-n junction

US5404028A · kind A · utility

11Cited by
1References
20Claims
0Family size

Assignee

Inventors

Key dates

Filing dateJan 22, 1993
Grant dateApr 4, 1995
Priority date
Expiry dateJan 22, 2013

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10D10/821

Abstract

An electrical junction is precisely located between a highly p doped semiconductor material and a more lightly n doped semiconductor material by providing a lightly p doped buffer region between the two materials, with a doping level on the order of the n doped material's. The buffer region is made wide enough to establish an electrical junction at approximately its interface with the n doped material, despite a diffusion of dopant from the p doped material. When applied to a heterojunction bipolar transistor (HBT), the transistor's base serves as the heavily p doped material and its emitter as the more lightly n doped material. The buffer region is preferably employed in conjunction with a graded superlattice, located between the buffer and emitter, which inhibits dopant diffusion from the base into the emitter. A p-n junction is formed within the superlattice, which functions on one side as an electrical extension of the emitter and on the other side as an electrical extension of the buffer, and establishes the electrical junction at the p-n junction location. The precise positioning of the electrical junction results in a known and repeatable emitter-base turn-on voltage.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.