Process for production of an integrated circuit
US5409857A · kind A · utility
12Cited by
3References
19Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Sep 7, 1989 |
| Grant date | Apr 25, 1995 |
| Priority date | — |
| Expiry date | Sep 7, 2009 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S148/164
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An integrated circuit is formed thereof a conductive wiring pattern. On the conductive wiring semiconductor layer is directly formed in a form of amorphous on the substrate. The amorphous semiconductor layer is annealed to form a polycrystalline structure while avoiding influence of annealing heat for the substrate. In the polycrystalline semiconductor layer is formed a semiconductor element, such as MOS transistor, MIS transistor, TFT and so forth. The semiconductor element is directly connected to the wiring pattern on the substrate.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.