Low distortion operational amplifier
US5410273A · kind A · utility
10Cited by
3References
10Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Nov 1, 1993 |
| Grant date | Apr 25, 1995 |
| Priority date | — |
| Expiry date | Nov 1, 2013 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F1/086
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
An op-amp comprising a single gain stage amplifier cascaded with a buffer and an output stage. The buffer comprises an amplifier which isolates the gain stage from the output stage to prevent loading of the gain stage and create a more linear op-amp. For frequency compensation, the op-amp utilizes MOSFETs connected in a reversed biased configuration as load compensation capacitors. This technique reduces the non-linear effects of MOSFET gate capacitors utilized in conventional Miller compensation schemes and allows for digital fabrication technology of low distortion, low power supply operational amplifier design.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.