Method of making high voltage transistor
US5411901A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Oct 25, 1993 |
| Grant date | May 2, 1995 |
| Priority date | — |
| Expiry date | Oct 25, 2013 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D84/87
Abstract
In a method for constructing a semiconducting device, within a substrate of a first conductivity type there is formed a well of second conductivity type. Within the well, an extended drain region of a first conductivity type is formed. An insulating region over the extended drain region is formed. A gate region is formed on a surface of the substrate. A first side of the gate region is adjacent to a first end of the extended drain region. A drain region of the first conductivity type is formed. The drain region is in contact with a second end of the extended drain region. A source region is formed on a second side of the gate region.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.