Multiplexed control pins for in-system programming and boundary scan state machines in a high density programmable logic device
US5412260A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Aug 13, 1993 |
| Grant date | May 2, 1995 |
| Priority date | — |
| Expiry date | Aug 13, 2013 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K19/1737
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A structure and a method to implement in-system programming (ISP) and boundary-scan testing in an integrated circuit using the same pins to control both functions. The SDI, SCLK, MODE and SDO connections required for in-system programming and the TDI, TCK, TMS and TDO connections required for boundary-scan testing are multiplexed such that they are provided from the same four pins. An in-system programming enable pin is used to control the multiplexing of these pins. In an alternative embodiment, both in-system programming and boundary-scan testing are performed using the same pins and the same state machine. The test logic architecture specified in IEEE Standard 1149.1-1990 is utilized. To implement the in-system programming instructions, the instruction register of Std. 1149.1-1990 is modified to include private instructions which perform the desired programming functions.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.