Inverted epitaxial process semiconductor devices
US5416354A · kind A · utility
33Cited by
53References
7Claims
0Family size
Assignee
Inventor
Key dates
| Filing date | Jan 3, 1994 |
| Grant date | May 16, 1995 |
| Priority date | — |
| Expiry date | Jan 3, 2014 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D64/519
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A semiconductor device is disclosed having improved vertical gain symmetry, and which includes thick, lightly-doped regions which are dielectrically isolated and provided by at least two separately processed semiconductor wafers which are bonded together and further processed to provide the finished device. Alternate embodiments include buried layers exhibiting very low resistance. Further alternate embodiments provide high voltage and/or high current devices which are fabricated together with low-power circuitry as an integrated circuit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.