High frequency IC package
US5418329A · kind A · utility
Assignee
Inventors
Key dates
| Filing date | Jun 11, 1993 |
| Grant date | May 23, 1995 |
| Priority date | — |
| Expiry date | Jun 11, 2013 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY10S174/35
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A high frequency IC package includes a dielectric package body having a surface, a high frequency signal transmission line and a power supply line disposed on the surface of the package body, a high frequency IC chip disposed on the surface of the package body and electrically connected to the high frequency signal transmission line and the power supply line by wires, and a lid hermetically sealing and shielding the IC chip. The lid includes a plane part parallel to the surface of the IC chip and side walls, perpendicular to the plane part, surrounding the IC chip. Since the side wall is not present on the surface of the package body but included in the lid, during the wire-bonding process of the IC chip, unfavorable contact between the cavity wall and bonding tool is avoided, reducing the lengths of bonding wires and signal transmission lines. As the result, reflection loss, conductor loss, and cavity resonance are reduced.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.